Baris Kasikci’s and his collaborators at Intel and Microsoft have made a splash in the world of software development! Software complexity is now a major concern not only due to the emergence of multicores a decade ago but also the slowdown in silicon efficiency pushing platforms and software to heterogeneity. Baris’ proposal, “failure sketching” is an automated debugging technique that provides developers with an explanation (i.e., a failure sketch) of the root cause of a failure that occurs in execution. These results, which appeared in the flagship conference USENIX in 2015, are getting integrated in software toolchains at Intel.
- Researchers at LTS4 Win Best Paper Award at ACM’s MMSys 2018 July 9, 2018
- David Atienza among Top Five Innovators in DAC’s under-40 Awards July 2, 2018
- EPFL Scholar Receives ISSS Excellence Award June 20, 2018
- EPFL Team Wins Distinguished Paper Award at IEEE Meet June 14, 2018
- Google’s PhD Fellowship for LAP’s Lana Josipović June 11, 2018