Anastasia Ailamaki will investigate the potentials of hardware/software co-design for efficient utilization of micro-architectural resources in collaboration with Huawei. Past research has shown that that DBMSs severely under-utilize their micro-architectural resources with more than 50% of the CPU cycles going for memory stalls and the number of retired instructions per cycle barely reaching one on machines that are able to retire four instructions per cycle. Pure software-level optimizations are not enough to fully exploit the micro-architectural resources. This under-utilization limits the performance of DBMSs and leads to poor energy efficiency. The goal of the project is to reconsider the design of OLTP systems by making the utilization of micro-architectural resources the highest priority so as to achieve high throughput, low latency, hardware utilization and better energy efficiency.
- Student-teacher Duo from EPFL Wins Best Demonstration Award at SIGMOND 2018 July 18, 2018
- Researchers at LTS4 Win Best Paper Award at ACM’s MMSys 2018 July 9, 2018
- David Atienza among Top Five Innovators in DAC’s under-40 Awards July 2, 2018
- EPFL Scholar Receives ISSS Excellence Award June 20, 2018
- EPFL Team Wins Distinguished Paper Award at IEEE Meet June 14, 2018