A Center for Sustainable Cloud Computing

Analytics & Applications

Embedded AI for Aerospatial Navigation

Deep learning (DL) algorithms for the computation of the satellite’s relative position and altitude.

Since the 1960s, nearly 9000 satellites have been launched into space by about 40 countries. Space exploration through the years has also left a trail of debris orbiting around the Earth. According to an estimate, there are more than 128 million pieces of debris smaller than 1 cm, about 900,000 pieces of debris ranging between 1 and 10 cm, and around 34,000 of pieces larger than 10 cm in orbit around our planet. Collision with debris is not only a hazard for spacecraft but also for the ISS. Therefore, it is imperative for scientists to clean up the space junk.

In a significant step in that direction, the European Union has allocated €86 million to remove the Vespa Upper Part, a 120-kg discarded object in orbit around the Earth since 2013. The startup ClearSpace will work with EPFL’s Embedded Systems Laboratory (ESL) and other research teams in this project.

ESL will help design, launch, and deploy a satellite to capture the Vespa Upper Part, before performing a reentry, burning up the target and itself in the atmosphere. Leveraging its core strengths, ESL will optimize the deep learning (DL) algorithms for the computation of the satellite’s relative position and altitude.

DL algorithms require high computational capabilities, and their optimization would be challenged by the bandwidth available between the memory and the processing elements, the limited energy budget of embedded processing systems, and fluctuating temperatures. Taking cognizance of these factors, ESL will design an ultra-low power embedded SoC computing architecture, which will include ARM CPU processors and hardware accelerators mapped on field-programmable gate array (FPGA) platforms. Moreover, ESL will optimize the initial DL code to maximize the use of this heterogeneous platform, comprising a number of processors and custom-made accelerators on FPGA.

Suggested Reading